Extraction based verification method for off the shelf Integrated Circuits
Yazarlar (4)
Daniel G. Saab
Case School of Engineering, Amerika Birleşik Devletleri
Vivek Nagubadi Case School of Engineering, Amerika Birleşik Devletleri
Doç. Dr. Fatih KOÇAN Bobby B. Lyle School of Engineering, Amerika Birleşik Devletleri
Jacob Abraham
Cockrell School of Engineering, Amerika Birleşik Devletleri
Bildiri Türü Tebliğ/Bildiri Bildiri Dili İngilizce
Bildiri Alt Türü Tam Metin Olarak Yayınlanan Tebliğ (Uluslararası Kongre/Sempozyum)
Bildiri Niteliği Web of Science Kapsamındaki Kongre/Sempozyum
DOI Numarası 10.1109/ASQED.2009.5206228
Kongre Adı Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium on
Kongre Tarihi 15-07-2009 /
Basıldığı Ülke Malezya Basıldığı Şehir
Bildiri Linki http://ieeexplore.ieee.org/document/5206228/
UAK Araştırma Alanları
Mühendislik
Özet
Off-the-shelf integrated circuits (ICs) are used in the design of many products. The IC is supposed to implement a set of available specifications describing the function of the IC. Users of off-the-shelf ICs need a simple and effective method to validate the specifications to insure that the IC implements exclusively the set of available specifications. In this paper, we propose an approach to validate these specifications by a set of IC re-engineering experiments. The proposed approach is based on the construction of a high-level description of the packaged IC and on using the extracted description to validate the specifications. The approach uses the scan operations (available for manufacturing test of the IC) and the IC specification to disassemble the states/flip-flops and output functions of the packaged IC. Using the disassembled functions, a register transfer level (RTL) model suitable for computer-aided design …
Anahtar Kelimeler
BM Sürdürülebilir Kalkınma Amaçları
Atıf Sayıları
Web of Science 5
Google Scholar 14
Extraction based verification method for off the shelf Integrated Circuits

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