Sharing of SRAM Tables Among NPN Equivalent LUTs in SRAM Based FPGAs
Yazarlar (2)
Jason Meyer
Bobby B. Lyle School of Engineering, Amerika Birleşik Devletleri
Bobby B. Lyle School of Engineering, Amerika Birleşik Devletleri
Doç. Dr. Fatih KOÇAN Bobby B. Lyle School of Engineering, Amerika Birleşik Devletleri
| Makale Türü | Özgün Makale (SSCI, AHCI, SCI, SCI-Exp dergilerinde yayınlanan tam makale) | ||
| Dergi Adı | IEEE Transactions on Very Large Scale Integration VLSI Systems | ||
| Dergi ISSN | 1063-8210 Wos Dergi Scopus Dergi | ||
| Dergi Tarandığı Indeksler | SCI-Expanded | ||
| Makale Dili | İngilizce | Basım Tarihi | 02-2007 |
| Kabul Tarihi | – | Yayınlanma Tarihi | 01-02-2007 |
| Cilt / Sayı / Sayfa | 15 / 2 / 182–195 | DOI | 10.1109/TVLSI.2007.893581 |
| Makale Linki | http://ieeexplore.ieee.org/search/srchabstract.jsp?tp=&arnumber=4142778&openedRefinements%3D*%26filter%3DAND%28NOT%284283010803%29%29%26searchField%3DSearch+All%26queryText%3DSharing+of+SRAM+Table | ||
| UAK Araştırma Alanları |
Algoritmalar ve Hesaplama Kuramı
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| Özet |
| This article introduces a novel lookup table (LUT) and its usage in the configurable logic block (CLB) architectures for SRAM-based field-programmable gate array (FPGA) architectures. The proposed CLB allows sharing of SRAM tables of LUTs among NPN-equivalent functions to reduce the size of memories used for storing the functions and also reduces the number of configuration bits required. We measured many different characteristics of FPGAs using our new CLB architecture, including area, delay, routing, and power requirements. We experimentally found that for many different FPGA architectures, CLBs can share one-fourth of their SRAM tables between two basic logic elements (BLEs), which reduced both power consumption and area without negatively affecting routing or wirelength, and there was only a negligible increase in critical path delay of 0.27%. Specifically, we find that FPGAs consisting of … |
| Anahtar Kelimeler |
| Configurable logic block (CLB) | Field-programmable gate array (FPGA) | NPN equivalence | SRAM table sharing |
BM Sürdürülebilir Kalkınma Amaçları
| Atıf Sayıları | |
| Web of Science | 9 |
| Google Scholar | 23 |